generate register model from sonics ip xact

Depending on the intended use of this SystemC or TLM component, this communication interface could require building a memory map for each input or output in the component. Because each system handles communication differently, you must define a communication interface for the SystemC or TLM component when it is generated from a Simulink model. This socket handles all the incoming and outgoing communication formatted as TLM transactions. In SystemC or TLM, each component communicates through a TLM socket. In Simulink, each block input or output is bound point-to-point to another block. You can use the tlmgenerator target for either Simulink Coder™ or Embedded Coder™. Otherwise, the tool is in support mode and provides its’ intermediate database for other flows.This example shows how to use an imported IP-XACT specification with memory map when you generate a SystemC™ or a Transaction Level Modeling (TLM) component from a Simulink® model with the tlmgenerator target. The tool has gone through verification and continues to be in development for extended functionality. The development was successful since the tool is able to transfer the information from IP-XACT file to database losslessly and then generate a VHDL file according to a register description from the IP-XACT file stored in the database. Tool was developed for the flow and is available alongside the old implementation. A database approach would enable easy modifications, big and small, and the database is constructed in such a way that IP-XACT can be regenerated from it. A database is planned to be used as an intermediate format between IP-XACT and VHDL. This thesis describes the update to the IP-XACT to VHDL flow. The previously developed tool that does the conversion has become very fragile to changes and its’ programming language differs from the rest of the flow. This IP-XACT file is interpreted and VHDL is generated based on its’ data. In this thesis project there is an existing register generator tool flow that uses IP-XACT as intermediate file format. Register bank generation tools enable developers to quickly generate registers for a SoC module according to a register configuration file. Register banks are fast memory of SoC modules and each SoC module requires their own set of registers to suit module’s needs. Automation tools do repetitive tasks and one of these tasks would be generation of register banks.

Tools are used for design, automation and verification purposes. The System on Chip (SoC) field relies on tools and processes.

Generate register model from sonics ip xact